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Product Spec

Basic Information
Product Status Under Development
Family SuperH
Series SH7250
Group SH7256R

Memory
Program memory 4096 KB Flash memory
RAM 256 KB
Data Flash 128 KB
Cache Memory Remark ROM cache: instruction cache (full associative, 8 lines, 16 bytes/line), data cache (full associative, 4 lines, 16 bytes/line); line size is 16 bytes/line

CPU (Bit, Clock, DMA, External Bus etc)
CPU SH2A-FPU (32-bit)
Max. Frequency 200 MHz
PLL YES
Power-On Reset YES
Floating Point Unit YES
DMA Remarks DMAC x 8 ch, A-DMAC x 78 ch
External Address/Data Bus YES
External Interrupt Pins 9
I/O Ports 144

Timers
16-bit Timers 38 ch
32-bit Timers 7 ch
Watchdog Timers 1 ch
Other Timers 24-bit timer x 81
PWM Output 28

Analog
A/D Converters 12-bit x 37 ch

Interfaces
CAN 4 ch
CSIs 5 ch
SPIs 3 ch
UARTs 5 ch
Serial Interface Remarks SCI (CSI:5ch/UART:5ch), RSPI (SPI:3ch)

Operating Conditions
Operating Voltage 3.0 to 5.5 V
Power Supply VCC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V, PVCC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V, AVREFH_A = AVREFH_B = 4.5 V to AVCC, VSS = PLLVSS = AVSS = AVREFL_A = AVREFL_B = 0 V, When PVCC1 = 3.3 V ±0.3 V, VCC = PVCC1.
Operating Temperature -40 to 125 ℃ (Ambient Temperature)

Remarks
Automotive

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Order Information

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Package

Package
Pins 272
Pin pitch 1 mm
Package Type BGA
Body Size 21x21 mm2
Package drawing prbg0272fa_a
Mount pad drawing fig0013e
Mounting height 2.1 mm
Mass 1.3 g
Renesas code PRBG0272FA-A (old: BP-272V)
JEITA code P-BGA272-21x21-1.00

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